FE310是Freedom Everywhere的子系列E300的一个流片实例，目标应用场合是微控制器、IoT、可穿戴设备等，其处理器核是E3 Coreplex子系列的一个实例——E31，支持RV32IMAC指令集。其采用180nm工艺成功流片，主频可以达到320MHz以上。 32MB的QSPI闪存，用于USB连接并用作JTAG接口的 ...

The SiFive E31 Standard Core is the world's most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of the RISC-V ISA, resulting in a power-efficient ...

The first chip from SiFive was the HiFive 1, which was based on the SiFive E31 CPU. We got our hands on the HiFive 1 early last year, and it is a beast. With the standard complement of ...

This guide is for the HiFive1 revision A board, not the revision B with onboard Segger J-Link and ESP32 modules. First and foremost the Freedom-E-SDK (or just SDK in short) is required. The SDK ...

The SiFive E31 Standard Core is the world's most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of the RISC-V ISA, resulting in a power-efficient core that ...

Below you can check out a few of the relevant slides from SiFive’s announcement today: The HiFive I, the ‘Arduinofied’ version of the E31 RISC-V microcontroller We’ve taken a look at ...

Red Hat Software, for example, has turned this approach into a thriving multi-billion-dollar business. But nothing comparable has ever succeeded in the SoC world. Enter SiFive, a startup that has been ...

US semiconductor company SiFive, which designs chips based on the open-source RISC-V architecture, has set up a China arm to tap the mainland’s fast-growing market for processors developed ...

Those concerns have helped raise the profile of SiFive, which provides processor designs using the open-source RISC-V architecture as an alternative. Intel has reportedly ended discussions with ...